The present invention relates to a method of producing a stencil mask to be used in a reduction projection printing lithography using a high-energy beam such as an ion beam, an electron beam or the like for carrying out a microfabrication on a semiconductor device.
A lithography technology using a high-energy beam such as an electron beam is not required to use a reticle and can form a fine pattern. Accordingly such a technology is used as means for a development of LSIs.
An electron beam direct writing method which has been conventionally widely used, is a so-called single writing method by which patterns are successively written one by one by a Gaussian beam (point beam) or a variable shaped beam using an electron gun of the field emission type or a thermal electron gun. More specifically, an electron beam emitted from an electron gun is condensed in the form of a slender beam spot on a resist by a condensor lens, and a deflection system controls the position of the beam spot, so that an arbitrary figure can be written on the resist.
This method can electrically correct distortion or aberration inside of a deflection field, thus advantageously enhancing the precision dependent on a control technology. Accordingly, this method has been developed in various manners and put in practical use. As shown in Journal Vacuum Science and Technology, B3 p. 106 by H. J. King et al (1985), a fine pattern not greater than 0.5 .mu.m can be optionally formed by pattern data with the use of an electron beam direct writing method.
According to this method, however, the spot diameter of the electron beam is about 0.1 to about 2 .mu.m. Thus, as a pattern to be written is reduced in size, the number of spots to be written is increased and subsequently, the number of pattern data is considerably increased. Further, due to limits of the working frequency of the deflection system, the spot moving speed is limited to a certain level, thus taking considerable time for writing. This disadvantageously lowers the throughput.
To solve the defects above-mentioned, there has been recently proposed, instead of a method of writing all patterns of an LSI chip in a manner like a single writing manner, a method of reduction-projection printing a pattern to be repeated with the use of a stencil mask.
FIG. 5 shows a method comprising the steps of dividing repeat areas of an LSI chip pattern into small-area partial patterns, forming each of the partial patterns on a stencil mask, and successively printing the partial patterns on a wafer with the use of the stencil masks. In FIG. 5, there is disposed an electron gun 50 for emitting an electron beam, a first aperture 51 for stopping down an electron beam, a printing lens 52, a deflection plate 53, a stencil mask 54 in which a partial pattern to be printed is formed, a reducing lens 55, a second aperture 56, an object lens 57, and a wafer 58 on which is printed an electron beam having passed through the partial pattern in the stencil mask.
According to this reduction projection printing method, the throughput becomes very fast, but the production of a stencil mask is very difficult.
The following description will discuss an example of a conventional stencil mask producing method with reference to FIGS. 6(a)-(c).
As shown in FIG. 6 (a), boron ions 61 are implanted to the surface of a semiconductor substrate 60 in a dose amount of 1.times.10.sup.20 cm with an accelerating voltage of 50 to 100 KV applied, thus forming an ion implantation layer 62. As shown in FIG. 6 (b), an epitaxial layer 63 of silicon is formed on the surface of the ion implantation layer 62, and a surface protective film 64 of silicon nitride and a reverse protective film 65 of silicon nitride are then respectively formed on the top of the epitaxial layer 63 and the reverse side of the semiconductor substrate 60.
With the use of lithography and etching, the reverse protective film 65 is selectively removed. With the remaining portion of the reverse protective film 65 serving as a mask, the reverse side of the semiconductor substrate 60 is then etched up to the ion implantation layer 62 with an ethylene diamine-pirocatechol solution, thus removing the surface protective film 64 and all the remaining portions of the reverse protective film 65, as shown in FIG. 6 (c).
As shown in FIG. 6 (d), a resist pattern 66 is formed on the epitaxial layer 63 with the use of an electron beam lithography technology. As shown in FIG. 6(e), with the resist pattern 66 used as a mask, the epitaxial layer 63 and the ion implantation layer 62 are etched to form a through-hole pattern 67, and then the resist pattern 66 is removed. To prevent the charge from being increased by the electron beam, gold may be evaporated on the surface of the epitaxial layer 63.
According to the method above-mentioned, there a stencil mask to be used in an electron beam reduction projection printing lithography is obtained.
However, this method requires an epitaxial technology and a high-energy ion implantation technology. Accordingly, this method is considerably complicated in technical point of view and takes considerable time.
Further, this method requires that the surface and reverse protective films 64, 65 are deposited and that only the epitaxial layer 63 and the ion implantation layer 62 of the semiconductor substrate 60 form a mask for shielding an electron beam. This causes the thickness of the mask to become dozen .mu.m or more. Accordingly, depositing and etching the epitaxial layer 63 are not facilitated.
As shown in Journal Vacuum Science and Technology, B8 p. 1836 by Y. Nakayama et al (1990), there has been proposed a method of etching a semiconductor substrate from the reverse side thereof, instead of using an epitaxial layer of a semiconductor substrate. According to such a method, it is difficult not only to control the thickness of a semiconductor substrate, but also to uniformly etch the semiconductor substrate. Also, it is difficult to vertically etch a semiconductor substrate over a dozen .mu.m or more.
FIG. 7 shows the projection ranges of electrons inside of silicon, tungsten, gold and stainless steel with respect to the accelerating voltages of electron beam. Normally, the accelerating voltage used in electron beam lithography is from 20 to 50 keV. Accordingly, when silicon is used as a mask, the silicon is required to have a thickness of about 20 .mu.m. However, it is very difficult to vertically etch silicon having a thickness of dozen .mu.m or more. Further, when silicon is used as a mask, it requires a great number of steps of ion implantation, epitaxial, lithography, etching and the like. Accordingly, a stencil mask producing method using a silicon process is disadvantageously complicated to process.
In this connection, there may be made a proposal in which metal is deposited on the surface of a silicon substrate and a mask is made in the form of a multi-layer film, thus reducing the silicon film in thickness.
However, gold cannot be etched and therefore can only be deposited on the mask surface. Further, as impurities in a semiconductor silicon process, gold is very difficult to handle. Also, gold presents an thermal expansion of 14.2.times.10.sup.-6 /deg while silicon presents a thermal expansion of 2.5.times.10.sup.-6, and gold presents a thermal conductivity of 3.1 cm.times.deg while silicon presents a thermal conductivity of 1.7 cm.times.deg. When a mask is irradiated by an electron beam, heat is subsequently generated to deform the mask. When gold is deposited on a silicon mask, the mask might be distorted. Further, making a mask in the form of a multi-layer film is disadvantageous because the process is complicated.